1. Field of the Invention
The present invention generally relates to phase lock loop circuits and, more particularly, to a digital phase lock loop circuit which exhibits high precision over a wide variation of frequencies and duty cycles.
2. Description of the Prior Art
Analog phase lock loop (PLL) circuits have been used for many years in a wide variety of applications. However, analog PLL circuits suffer from sensitivity to DC drifts and component saturations and need for calibration and periodic adjustments.
Digital PLL circuits do not suffer from these problems. The implementation of the PLL in the digital domain is reported by William C. Lindsey and Chak Ming Chie in "A Survey of Digital Phase-Locked Loops", Proc. IEEE, vol. 69, pp. 410-431, April 1981. Representative examples of digital PLL circuits in the prior percent art are disclosed in U.S. Pat. No. 4,795,985 to Gailbreath, Jr., U.S. Pat. No. 4,820,993 to Cohen et al., U.S. Pat. No. 4,845,685 to Wechsler et al., and U.S. Pat. No. 4,847,870 to Butcher.
Certain military applications, such as equipment for testing circuits in missiles under development by the Department of the Navy, require precision PLL circuits. In the past, a voltage-controlled resistor would have been used for this application. However, this device is analog and would not achieve the precision needed in PLL circuits for these applications. Also, use of a voltage-controlled resistor would not be practical due to the considerable amount of circuitry required to implement its use. Thus, a need exists for a digital PLL circuit capable of providing more precision.